| 摘要 |
1. Multi-dimensional DPCM coder with a high processing speed, characterised by : a) A quantisation device (QE) which is preceded by a series circuit of a first, second and third subtracting unit (SU1, SU2, SU3), the first subtracting unit (SU1) being supplied with digitised samples (si) from the input (1) of the coder, b) A first computing loop which is fed back from the output (3) of the quantisation device (QE), at which quantised DPCM values (DELTA si, q) are output, via a first multiplier (M1) which multiplies by a constant prediction factor (a), to the subtraction input (-) of the third subtracting unit (SU3) which directly precedes the quantisation device (QE), c) An inner computing loop which exhibits a first adder (AD1), which is connected to the output (3) of the quantisation device and the output of which is fed back via the series circuit of a second register (R2) and a second multiplier (M2) and via a second adder (AD2) to the second input of the first adder (AD1), d) A second computing loop which is fed back from the output (3) of the quantisation device (QE) via the first adder (AD1), the second register (R2) and via two multipliers (M2, M3), which in each case multiply by the prediction factor (a), to the subtraction input (-) of the second substracting unit (SU2) preceding the third subtracting unit (SU3), and e) A third computing loop which is fed back via the first adder (AD1) and a line predictor (PRL) which delivers at its output (6) an additional estimated value (szi) to the subtraction input (-) of the first subtracting unit (SU1), the output (6) of the line predictor (PRL) also being connected via a register (Rz+1 ) to the second input of the second adder (AD2) in the inner computing loop. |
