发明名称 STORAGE DEVICE ACCESS SYSTEM
摘要 PURPOSE:To decrease the number of program steps for writing and to improve the throughput by controlling respective circuits on a time-division basis by a communication multiplexing device by using control memories provided corresponding to subchannel numbers. CONSTITUTION:When a signal of 1 is supplied onto a mode switching signal line 16, a memory control part 17 which is supplied which an address through an address bus 14 generates select signals on memory select lines 190-19N corresponding to the address and write data from a data bus 15 in a storage area specified by the address on the address bus 14 of control memories 18D-18N. When a signal of 0 is supplied to the mode switching signal line 16, the address bus of a subchannel specifying part connected to the memory control part 17 becomes ineffective, but the address bus 14 becomes effective in one subchannel; and select signals are generated on all memory selection lines 190-19N and the same contents are written in the same addresses of the control memories 180-18N.
申请公布号 JPS62105249(A) 申请公布日期 1987.05.15
申请号 JP19850244402 申请日期 1985.10.31
申请人 FUJITSU LTD 发明人 KAWATE MASATO;SATO TATSUO
分类号 G06F12/06 主分类号 G06F12/06
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