| 摘要 |
PURPOSE:To form a complementary clock signal having no phase delay, by forming the non-overlap clock signal of an opposite phase to each other by using a differential amplifying circuit for receiving a fundamental clock signal and its inversion signal. CONSTITUTION:The fundamental clock signal phi1 and its inversion signal phi1 are supplied to the gates of a differential MOSFET Q13 and Q14 of an N channel type. On the drains of the differential MOSFET Q13 and Q14, P channel MOSFETs Q15, Q16 being in a current mirror form are provided a load circuit. An output signal obtained from the drain of the differential MOSFET Q14 passes through a bipolar type NPN transistor T1, and an emitter-follower circuit consisting of a constant-current MOSFET Q18 provided on its emitter, and a clock signal phi1' of the same phase as a fundamental clock signal phi1 is outputted. In this way, the on-overlap time of the fundamental clock signal can be set to the necessary minimum. |
