| 摘要 |
PURPOSE:To process an editing instruction at a high speed by adding a register and a latching circuit, in a processor for executing an instruction for editing a decimal number of a pack format to a zone format data. CONSTITUTION:Between a register 2 for holding one word portion of the second operand, and a memory 10, a register 4 for holding the next one word portion is provided. Also, a latch 5 for showing a fact that a transfer has been executed from the register 4 to the register 2 is provided. In this state, when it is detected that the contents of the register 2 have all been used, the data transfer from the register 4 to the register 2 is executed and also the latch 5 is set. Subsequently, when the next one word of the second operand has been set to the register 4, the latch 5 is reset. In this way, a data replenishment of the second operand can be executed smoothly, therefore, an editing instruction can be executed at a high speed. |
