| 摘要 |
<p>A flash analog-to-digital (A/D) converter includes a plurality of comparators (110,120,130), each of which is arranged to be alternatively coupled with the input signal (30) and the respective one of a plurality of reference voltages in ordertofind the closest match therebetween. The output of the comparators is fed for example programmable logic array for determining a binary number related to the particular value ofthe input signal. Pursuant to this invention, the input signal is continuously tracked (140), and in dependence upon whether the input signal is above or below the midpoint reference potential, a predetermined (.75VREF or .25VREF) potential, instead of the input signal, is applied (152,154;162,164) to particular groups (110,130) of the comparators so as to limit loading.</p> |
