| 摘要 |
PURPOSE:To execute a data transfer passing through an interface controlling circuit in the almost same time as data transfer time between an I/O circuit connected directly to a high speed bus, and a computer, by providing a register, an address counter, etc. CONSTITUTION:In case of a computer 1 writes a data by one word each to a device address of an I/O circuit 12a, first of all, it is transferred from the computer 1 to an interface controlling circuit 2. That is to say, a register 5 of the circuit 2 is constituted so that plural words are stored in the respective address positions, and a data transfer is executed through an address counter 7. In this way, the data transfer time to the circuit 12a can be shortened. Also, in case of transferring the data to the computer 1 from the circuit 12a, as well, it is executed by storing its data in the register 5, before the computer 1 requests the next data. In this way, a data transfer passing through the circuit 2 can be executed in the almost same time as a transfer time in case of the circuit 12a and the computer 1 have been connected directly to a high speed bus 3.
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