发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To obtain multilayer wiring structure having small contact resistance and having favorably electric performance at manufacture of a semiconductor device by a method wherein at a process to open a hole for through hole in an interlayer insulating layer, the hole is opened by etching the interlayer insulating layer using gas containing a component to etch an under layer conductive layer. CONSTITUTION:An interlayer insulating film 4 is etched using a photo resist 5 as a mask to open a through-hole 6. At this time, mixed gas of CHF3 and CO2 (the ratio is 1:1) added with chlorine gas of 1-5% is used as etching gas. After then, the photo resist 5 is removed, and a top layer Al wiring 8 is formed to complete an Al two layer wiring. Moreover, before Al for the top layer Al wiring is to be evaporated by sputtering, Ar sputter etching is performed in the same chamber to remove a natural oxide film grown on the under layer Al wiring in the through hole.
申请公布号 JPS61289648(A) 申请公布日期 1986.12.19
申请号 JP19850131471 申请日期 1985.06.17
申请人 MATSUSHITA ELECTRONICS CORP 发明人 MAYUMI SHUICHI
分类号 H01L21/3213;H01L21/302;H01L21/3065 主分类号 H01L21/3213
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