发明名称 MEMORY CONTROLLER
摘要 PURPOSE:To reflect a memory access request on a main storage by invalidating a flag for displaying the validity of a main storage physical address to be separated in a conversion table after the end of the execution of cache discharging operation. CONSTITUTION:At the separation of the main memory, V bits are reset by a V-bit reset means 15 after the execution of cache discharging operation. When a memory access request accompanied with a memory address for indexing a conversion table 8 in which a main memory physical address to be separated is registered is generated during a series of operation for cash discharging, the memory request can be reflected on the main memory if a directory memory 9 in which the memory address of the memory access request is registered is not invalidated. The address of a storing request generated after invalidating the memory 9 is stored and the cache discharging operation is continued, so that stored data can be reflected on the main storage.
申请公布号 JPS61286944(A) 申请公布日期 1986.12.17
申请号 JP19850127969 申请日期 1985.06.14
申请人 NEC CORP 发明人 HASEGAWA MASAO
分类号 G06F12/08;G06F12/16 主分类号 G06F12/08
代理机构 代理人
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