| 摘要 |
PURPOSE:To drastically shorten the test time of the titled device by substantially enabling the connection of a power source whose voltage value is lower than that of a power source connected to a flip-flop as a memory cell, to the output- side of the flip-flop. CONSTITUTION:In the process of the wafer test to select nondefective chips after completing the wafer process, the normal voltage is supplied to a power source Vcc1, and a voltage lower than that to the source Vcc1 is supplied to a power source Vcc2 to execute the writing of data. Meanwhile, when reading out, for purpose of preventing malfunction, the source Vcc2 is made of the same voltage as the source Vcc1, and the memory information is checked. At this time, because the source Vcc1 is of normal voltage, the peripheral circuit operates normally. Consequently, because only the writing voltage can be lowered, the data-holding time can be drastically shortened, and test time can also be shortened down to a half or less of the normal length.
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