发明名称 DIRECT MEMORY ACCESS CONTROL SYSTEM
摘要 PURPOSE:To transfer rectangular image data at a high speed with direct memory access (DMA) by performing processings of address and data transfer quantity in the X direction and those in the Y direction independently of each other and providing processing circuits independent of each other in the data read side and the data write side. CONSTITUTION:Image data in a bit map memory 26 is read out to a FF 25 in the X direction successively bit by bit in accordance with the address, which counters 16 and 18 indicate, by the control of a control circuit 15. Data in the FF 25 is written successively on the address indicated by counters 20 and 22. The address in the counter 18 is counted up by +1 and the data transfer quantity in the counter 19 is counted down by -1 after data in the X direction is read out by the number of bits indicated by a counter 17, and this operation is repeated until the contents of the counter 19 are zero. If values in counters 17 and 21 are equal to each other and those in counters 19 and 23 are equal to each other, the control circuit 15 counts up the counter 20 by +1 synchronously with the counter 16 and counts up the counter 22 by +1 synchronously with the counter 18. If they are not equal to each other, the address in the counter 20 and that in the counter 22 are changed in accordance with differences to write data.
申请公布号 JPS61276049(A) 申请公布日期 1986.12.06
申请号 JP19850118015 申请日期 1985.05.31
申请人 FUJITSU LTD 发明人 MURATA HIDEKI
分类号 G06F13/28;G06F12/02 主分类号 G06F13/28
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