发明名称 PREVENTING CIRCUIT FOR DEVICE BREAKDOWN DUE TO ADVERSE CONNECTION OF POWER SUPPLY TERMINAL
摘要 PURPOSE:To prevent the drop of the actual power supply voltage obtained by a terminal at the output side by using two pairs of P and N channel MOS transistors Tr to which the drain and source electrodes are connected in common with each other. CONSTITUTION:When the high potential voltage VCC and the low potential voltage GND are applied to input terminals V1 and V2 respectively, a conductive state is secured between the source and the drain of a P channel MOSTr11 as well as between the source and the drain of an N channel MOSTr13. Thus the output terminals VH and VL conduct with terminals V1 and V2 respectively and are equal to the voltage VCC and the voltage GND respectively. When the GND and the VCC are supplied to the terminals V1 and V2 respectively, a conductive state is secured between the source and the drain of the P and N channel MOSTr12 and 14 respectively. Thus the conductive state is secured between terminals V2 and VH as well as between terminals V1 and VL respectively. Then the voltage VCC and the voltage GND are obtained at terminals VH and VL respectively.
申请公布号 JPS61273615(A) 申请公布日期 1986.12.03
申请号 JP19850117201 申请日期 1985.05.30
申请人 TOSHIBA CORP 发明人 SHIGEMATSU TOMOHISA;UCHIDA KAZUYUKI
分类号 G05F1/10;G05F1/56;G05F1/569;G05F3/24 主分类号 G05F1/10
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