| 摘要 |
PURPOSE:To improve the mass-productivity and to attain high speed, high circuit integration and low power consumption by connecting a collector of an NPN transistor (TR) whose emitter is connected to a power supply via the 2nd resistor and whose base is connected to the emitter via the 3rd resistor, to a collector of an output TR. CONSTITUTION:When an output of pre-stage circuits 1, 2 is at a low level and an output of pre-stage circuits 3, 4 is at a high level, an output high level voltage VOH of a NAND gate circuit 19 using the emitter of the TR as the input and using the collector of the TR 6 as the output is expressed in equation, where beta120 is a current amplification factor when a TR 20 is in reverse opera tion and VBC20 is a base-collector forward voltage of the TR 20. In general, a current amplification factor beta1 of each TR in a semiconductor integrated circuit chip has a correlation, and in the equation, as the beta17 is larger, the beta120 is larger. Thus, the 2nd and 3rd terms in the right side are cancelled together and the difference in VOH between a chip having a large beta1 and a chip having a small beta1 is decreased as a whole. |
