| 发明名称 |
Coherent interface with wraparound receive and transmit memories |
| 摘要 |
An interface for use between an asynchronous bus and a signal processor is disclosed. The interface utilizes both a wraparound receive and transmit memory to ensure coherency with very little processor overhead.
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| 申请公布号 |
US4623997(A) |
申请公布日期 |
1986.11.18 |
| 申请号 |
US19840681166 |
申请日期 |
1984.12.13 |
| 申请人 |
UNITED TECHNOLOGIES CORPORATION |
发明人 |
TULPULE, BHALCHANDRA R. |
| 分类号 |
G06F13/28;G06F13/40;G06F13/42;H04L12/56;(IPC1-7):H04J3/00 |
主分类号 |
G06F13/28 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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