| 摘要 |
PURPOSE:To attain changeover from an active to a stand-by transmission line without any slip by using a first-in first-out FIFO memory, to read a reception signal from the FIFO memory connected to the standby transmission line at the interruption of an input signal from the active transmission line. CONSTITUTION:A signal is sent from a signal source 1 to the active transmission line 2 and the stand-by transmission line 3. The signal from the transmission line 2 is supervised by a clock interruption detection circuit 4 and a clock recovery circuit 5 uses a tank circuit having a longer time constant than that of the interruption detecting circuit 4 to output a clock signal for a prescribed time even after the signal from the transmission line 2 is interrupted. The signal from the transmission line 2 is recovered by a signal recovery circuit 6 operated by the clock from the clock recovery circuit 5. Then the recovered signal is written on the FIFO memory 8 by using a clock from the circuit 5 and read by another clock CKR. When the signal from the active transmission line is given normally, a reception signal is outputted through gates 10, 11. |
