| 摘要 |
PURPOSE:To eliminate a noise pulse and to avoid the change in the input/output pulse width by providing the 1st and 2nd gate circuits to which an input pulse and its delay pulse are inputted and a storage circuit inputting a signal from both the circuits. CONSTITUTION:An input pulse from an input terminal 30 is delayed by gate circuits 1, 2 and 3, 4 and the input pulse, an output of the circuit 2, and an output of the circuit 4 becomes respectively the input to gate circuits 5, 6. The output of the circuit 5 and an output being the inversion of the output of the circuit 6 are inputted to an RS latch circuit comprising gate circuits 5, 6. The RS latch circuit outputs the output of the circiut 8 to an output terminal 31, set by a trailing trigger of the output of the circuit 5 and reset by the trailing of the circuit 7, then the input/output pulse width is unchanged. When the pulse width of each signal is shorter than the delay time of the circuits 1-4 while the input to the terminal 30 is a noise pulse, since the output of the circuit 5 is unchanged and the latch circuit is unchanged, no noise pulse is produced at the output. |
