| 摘要 |
PURPOSE:To attain the application of address interleave by providing a means to each main memory to receive access start designations for the data and key memory parts independently of each other and executing the access to one or both of the data and key memory parts. CONSTITUTION:A main memory 1 designates a byte address by an access request address 10 with 32 bits (the 0-th-31st). It is shown that the desired data exists at the data memory parts MSU 0 and 1 when the 25th bit is equal to '0' and '1' respectively. Thus either one of data memory part start latches 11-0 and 11-1 is turned on by the 25th bit. Then it is decided centering on 8 mega-bytes whether a key exists in a main memory 5-0 or 5-1. As a result, the access starts are carried out at a time with the same address to both memories 5-0 and 5-1. However, one of four cases is designated by the combination of latches, and the accesses are carried out in parallel to both data and key memory parts by both main memories.
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