| 摘要 |
PURPOSE:To reduce the current consumption without causing an increase of an element and a wiring by connecting a resistance between an earth and an emitter of the other transistor for constituting a logical gate, whose base is connected in common to a base of one transistor of a power source side, in two transistors for constituting a NAND gate. CONSTITUTION:A resistance R30 is inserted between an emitter of a transistor Q5 for constituting a NOR gate, and a GND. A value of this resistance R30 is selected so that a voltage generated across its resistance becomes equal to a saturation voltage of a transistor Q4 for constituting a NAND gate. That is to say, as for the saturation voltage VSAT of each transistor, VSAT=0.1V at the time of a current amplification factor beta=1, or as for a base - emitter voltage of each transistor, VBE=0.7V, and when it is supposed that an L level signal is impressed to an input 1 and an input 2, transistors Q1, Q6 and Q7, and a transistor Q2 and Q4 to which a bias voltage is applied by a resistance R5 become on. In the same way, the transistor Q5 to which a bias voltage is applied by a resistance R7 also becomes on.
|
