| 摘要 |
PURPOSE:To attain ease of multiplex for various digital data by utilizing a part not sending a PCM sound signal of a digital sound data so as to apply sequential multiplex to a data in the lateral direction of an interleave matrix. CONSTITUTION:A packet gate signal generating section 31 forms a packet gate signal being logical 1 at a bit area possible for packet multiplex under the control of a synchronizing circuit 29 and a sound operation mode input. A packet gate signal and a burst clock signal generated by gating a clock input at an AND gate 32 are read from a packet buffer 26 via a 32N-adic counter 28. Further, the read data is gated by an AND gate 27 by using a packet gate signal similarly and the result is fed to a digital sound data subject to multiplex by a sound multiplex circuit 22. Then a bit stream is extracted through a BCH coding circuit 23, an interleave circuit 24 and a frame synchronous code addition circuit 25 sequentially. |
