发明名称 1/2N SYNCHRONIZING SIGNAL GENERATING CIRCUIT
摘要 PURPOSE:To prevent malfunction of a T flip-flop due to racing by using an output of a latch circuit of a master section in the inside of the T flip-flop as an output given to a gate to obtain a synchronizing signal. CONSTITUTION:n-Stage of T flip-flops 31, 32,...,33 are connected in cascade and outputs from terminals M of each stage are inputted to an AND gate 34 to obtain a synchronizing signal SYN. Since an unbalanced capacitance based to generate the synchronizing signal SYN is not connected to the output of each T flip-flop, no effect is given to the racing of the T flip-flop of the next stage so as to prevent malfunction by the racing.
申请公布号 JPS61198920(A) 申请公布日期 1986.09.03
申请号 JP19850039255 申请日期 1985.02.28
申请人 TOSHIBA CORP 发明人 KAMAYA YUKIO;SHIMIZU SHOICHI
分类号 H03K23/58;H03K23/00 主分类号 H03K23/58
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