发明名称 Variable frequency divider
摘要 A variable frequency divider which includes a feedback shift register having a feedback gate of NOR type, a delay shift register for delaying output data from the feedback shift register by one clock, a control shift register having a control gate of AND type, a feedback circuit for feeding output data from the delay shift register and from the control shift register back to the feedback gate, and an expander which receives output data from the feedback shift register and produces a control signal according to said frequency dividing input and a frequency division ratio instruction signal. The control gate receives output data from the delay shift register and the control signal.
申请公布号 US4606059(A) 申请公布日期 1986.08.12
申请号 US19840592849 申请日期 1984.03.23
申请人 TOKYO SHIBAURA DENKI KABUSHIKI KAISHA 发明人 OIDA, YOSHIO
分类号 H03K23/64;H03K23/54;H03K23/66;H04B1/26;(IPC1-7):H03K21/36 主分类号 H03K23/64
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