| 摘要 |
PURPOSE:To simplify the process and narrow the diode region, by forming a junction region which is given by laminating two silicone layers differing in conduction type one on top of the other over a required region, and applying heat-treatment. CONSTITUTION:A substrate 1 is laminated with an insulating film 2, on which a P-type polysilicone layer 41 is formed. The layer 41 is patterned, as prescribed, by being subjected to a photomechanical- and an etching process, and then laminated with an N-type polysilicone layer 51, one on top of the other over a required region. The layer 51 is subjected to a photomechanical- and an etching processes, followed by heat-treatment. These processes allow a simple forrmation of junctions and resultantly narrow the diode region 61, leading to the build-up of integration. |
