发明名称 COORDINATE INSPECTION OF WAFER MAP
摘要 PURPOSE:To enable the correction of wafer maps by a method wherein each coordinate is judged whether finished in measurement (state of '1') or unfinished in measurement (state of '0') through inspection of coordinates determined in the direction of advancement of a probe card, and the result is compared with pre-determined patterns of '1' and '0'. CONSTITUTION:In the case of the upward movement of a probe card 12 in the Y-axis, when the coordinate of a chip under measurement is (x, y) in a wafer map 13, chips finished in measurement from among adjacent chips lie each at coordinates (y+1, x-1), (y, x-1), (y-1, x-1), (y-1, x), and chips unfinished in measurement lie each at coordinates (y+1, x+1), (y, x+1), (y-1, x+1), (y+1, x). Therefore, if all the vertically reverse L-shaped patterns are '1' and all of the laterally reverse ones are '0' around a chip under measurement, the result of measured chips is registered at right positions of the wafer map 13, and it is possible to completely inspect the address shift of the wafer map 13.
申请公布号 JPS61171147(A) 申请公布日期 1986.08.01
申请号 JP19850012156 申请日期 1985.01.25
申请人 FUJITSU LTD 发明人 IIZUKA TSUNEO
分类号 H01L21/66;(IPC1-7):H01L21/66 主分类号 H01L21/66
代理机构 代理人
主权项
地址