发明名称 MEMORY ACCESS CONTROL SYSTEM
摘要 PURPOSE:To attain the common start control by sending the 1st address to a main memory, then checking the inhibition items for memory access and sending the 2nd address to the main memory only when a memory access is possible. CONSTITUTION:A memory controller 2 sends unconditionally a row address strobe RAS to a main memory 3 by an address converting mechanism 6 after a prescribed period of time when a memory access is started from a CPU1. Then the controller 2 performs various types of checks including the success/ failure check of decoding and address conversion, the storage protection check, etc. Then a row address strobe CAS is sent to the memory 3 for execution of the control according to each access mode. If some trouble is detected through said various checks, the transmission of the CAS is inhibited regardless of the type of the access. Then the transmission of the RAS is through automatically. Thus it is possible to perform the common start control regardless of the type of the access mode. This accelerates the memory access.
申请公布号 JPS61166646(A) 申请公布日期 1986.07.28
申请号 JP19850007996 申请日期 1985.01.19
申请人 PANAFACOM LTD 发明人 KATAKURA OSAMU
分类号 G06F12/02;G06F12/00;G11C11/406 主分类号 G06F12/02
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