| 摘要 |
PURPOSE:To prevent an I/O from a secondary effect at the time of emulation by inhibiting a command output to a storage device and an I/O device at the generation of an interruption request. CONSTITUTION:A CPU1 sends an address to address bus 102 to specify a memory 2, an I/O3 or the like, sends a command for distinguishing the memory 2 and the I/O3 to which data are to be transferred or specifying a data transfer direction and its timing to a command bus 101 and transmits/receives data through a data bus 103. Each of respective buses 101-103 generally consists of plural signal lines, the states of respective buses are monitored by a bus monitoring devices 4, and when the bus state is turned to the previously set up state an interruption request is generated to the CPU1 through a signal line 104 and inhibits the command output to a three-state buffer 7.
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