发明名称 System memory for a reduction processor evaluating programs stored as binary directed graphs employing variable-free applicative language codes.
摘要 <p>A system memory for a reduction processor which evaluates programs stored as binary graphs employing variable-free applicative language codes. These graphs are made up of nodes, each of which exists in memory and contains as its most significant bit a mark bit which when set indicates that the node is being used in a graph and when reset indicates that the node or storage location is available for future use by the processor. In order to accommodate the scanning of a number of storge locations in parallel, the system memory is divided into a node memory and the mark bit memory so that the mark bits for a number of sequential storage locations can be examined in parallel to determine which node locations are free for use by the graph manager.</p>
申请公布号 EP0187713(A2) 申请公布日期 1986.07.16
申请号 EP19860300088 申请日期 1986.01.08
申请人 BURROUGHS CORPORATION (A DELAWARE CORPORATION) 发明人 LOGSDON, GARY L.;SCHEEVEL, MARK R.;WINCHELL, MICHAEL A.
分类号 G06F12/00;G06F9/44;G06F9/45 主分类号 G06F12/00
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