发明名称 PROCESSOR IN FAULT DETECTION MODE FOR LEARNING CONTROL SYSTEM
摘要 PURPOSE:To improve the reliability with detection of faults by detecting both the check bit value and the learning value of a backup memory with a fault detector of a learning control system and initializing the contents of the memory if both said values are out of set values. CONSTITUTION:The engine load information and the information on the rotational frequency of the engine, the driving speed of a car, etc. are supplied to a CPU1. At the same time, the programs and data are supplied to the CPU1 from a RAM2. While a stand-by RAM3 supplies the past learning value to the CPU1. A part 8 to be controlled controls a fuel injection valve, an igniter, etc. The voltage is always applied to the RAM3 from a secondary power supply together with a check bit set. Then the RAM3 is initialized if it keeps no prescribed value and also when the detected value exceeds the learning value to prepare for detection of faults.
申请公布号 JPS60262246(A) 申请公布日期 1985.12.25
申请号 JP19840117355 申请日期 1984.06.07
申请人 MITSUBISHI JIDOSHA KOGYO KK 发明人 DANNO YOSHIROU;TAKAHASHI AKIRA;IIDA KAZUMASA
分类号 G06F11/00;G06F15/18;G06N3/00;G06N99/00 主分类号 G06F11/00
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