| 摘要 |
PURPOSE:To prevent the increase in propagation delay time due to fluctuation of a voltage of a drive power supply by limiting an output voltage of a junction field effect transistor (TR) being a preceding gate to be an input voltage of a junction field effect TR being a succeeding gate to a forward voltage of a P-N junction or below. CONSTITUTION:A gate terminal of junction field effect TR(J-FET)12, 22 is connected to a limiting power supply via Schottky barrier diodes (SBD)14, 24. A V1 of the SBD14, 24 is nearly 0.6V in general and when a voltage over it is applied to th forward direction, a current flows to the SBDs14, 24. Thus, in setting a voltage (VGG) of the limiting power supply to nearly 0.4V, so long as there is a margin in the current capacity of the SBD24, an input voltage of the J-FET22 is limited to nearly 1.0V. That is, even when a VDD is high and an output voltage of the J-FET12 exdeeds nearly 1.0V, a current flows to the SBD24 and the output voltage of the J-FET12, that is, the input voltage of the J-FET22 is limited to nearly 1.0V.
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