| 摘要 |
PURPOSE:To facilitate to integrate the circuits and to reduce the power consumption by activating the channel memory which necessitates the memory of time division multiplex data at the time of recording and giving thereto the memory selection signal in power consumption status. CONSTITUTION:An address counter 2 is provided which sends an address designation signal as an input control signal the address is designated sequentially and repeatedly to each memory 111-1nm. Signal generator 31-3n are provided which send out the memory selection signal which selects the memory necessitating memorizing and activate it, and turns the power source to consumption state. Only the memory designated by the selection signal memorizes the multiplex data according to the data designation made by an address counter 2. Among the memory 111-1nm, the ones which are not activated are turned to high output impedance, and the exit highway D01-Dnm can be connected parallelly to each corresponding memory. The ratio of all the number N1 to be written equivalent to one frame N1 and all the number N0 of writing equivalue to one from is 1/n, therefore the consumption of the power is reduced to 1/n. |
