发明名称 FACSIMILE EQUIPMENT
摘要 PURPOSE:To enable to insert a necessary fill and reduce time for processing by adding seven continuous 0 signals to an encoded facsimile signal having optional signal length, adding necessary number of 0 signals by serial/parallel converting device, and sending out facsimile signals in unit of 8-bit. CONSTITUTION:An FILL 7 generating circuit 3 is started by an encoder 2, and outputs seven 0 signals continuously following a clock 100. The output is inputted to a shift register 5 by an OR circuit 4 following an encoding signal and an EOFB signal. Above-mentioned signals inputted to the shift register 5 are shifted by the clock 100, and the content (8-bit parallel) is read by a communication controlling section 6 at output timing of 1/8 frequency dividing circuit 7. EOFB is reported to the communication controlling section from the encoder 2, and necessary number of 0 signals of byte unit are prepared and sent out to a circuit. Fill can be inserted by adding FILL 7 code to the EOFB signal.
申请公布号 JPS61105971(A) 申请公布日期 1986.05.24
申请号 JP19840228205 申请日期 1984.10.30
申请人 FUJITSU LTD 发明人 ODA TAKAO
分类号 H04N1/40;H04N1/415 主分类号 H04N1/40
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