发明名称 A single transistor/capacitor semiconductor memory device and method for manufacture.
摘要 <p>A method of manufacturing a semiconductor memory device provides increased capacitance from memory cells of a dynamic RAM. In this method there are formed a plurality of island regions surrounded by an insulating layer (6) embedded in field regions (4) of a semiconductor substrate (1) so that the insulating layer (6) has a flat surface in the field regions (4). An etching mask (7) is formed on the substrate (1) and continues across a middle part of each of the island regions in a first direction. The insulating layer (6) is etched where it is not covered by the etching mask (7). Capacitor electrodes (8, 10) are formed so as to be separated by a thin insulating film (9) and cover the exposed lateral walls and upper surfaces of the island regions. Then gate insulating films (11) are formed on the upper surface of the middle part of the island regions after removing the etching mask (7). A gate electrode (12) is formed for each transistor, the gate electrodes (12) continuing across the plurality of island regions in the first direction. The gate electrodes (12) are so disposed as to constitute word lines while bit lines (16) connect the drains of the MOS transistors in the memory cells. </p>
申请公布号 EP0181162(A2) 申请公布日期 1986.05.14
申请号 EP19850307925 申请日期 1985.10.31
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 WADA, MASASHI C/O PATENT DIVISION TOSHIBA;WATANABE, SHIGEYOSHI C/O PATENT DIVISION TOSHIBA;MASUOKA, FUJIO C/O PATENT DIVISION TOSHIBA
分类号 H01L27/10;H01L21/762;H01L21/8242;H01L27/108;H01L29/94;(IPC1-7):H01L21/82 主分类号 H01L27/10
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