| 摘要 |
PURPOSE:To perform address conversion at a high speed by performing conversion between logical addresses and physical addresses to generate a table and switching the table in every unit of conversion at the DMA transfer time. CONSTITUTION:A conversion table generating circuit 11 receives a signal indicating a process number, a start address signal, and a signal indicating the transfer number to generate a conversion table 14. The conversion table generating circuit 11 supplies a DMA enable signal to a DMA control circuit 12. The DMA control circuit 12 receives not only the DMA enable signal but also a DMA transfer strobe signal, the start address signal, and the signal indicating the transfer number to supply a logical address to a logical-physical address converting circuit 13. The logical-physical address converting circuit 13 receives information from the conversion table 14 to convert the logical address to a physical address. |
