发明名称 A/D CONVERTER
摘要 <p>PURPOSE:To reduce beat disturbance with a chrominance subcarrier by using a deviation of a digital data after A/D convertion within a range where the processing circuit is operated normally so as to apply frequency modulation to a sampling clock. CONSTITUTION:The 1st oscillator 3 applies a sampling clock 4 to an A/D converter 2. Since the frequency of the chrominance subcarrier of a composite color television signal 1 and the frequency of the clock 4 are not synchronized, a beat disturbance is generated in general and the beat disturbance is at standstill or drifted due to the frequency stability and then the disturbance is remarkable visually. In this case, the 2nd oscillator 5 is provided and an oscillator 5 applies frequency modulation to the clock 4, since the clock is changed timewise, the beat disturbance is changed in matching therewith, the disturbance is not remarkable and the beat disturbance is reduced equivalently. Thus, it is required to bring the deviation of the frequency modulation to nearly 1% of the modulated frequency.</p>
申请公布号 JPS6167387(A) 申请公布日期 1986.04.07
申请号 JP19840189905 申请日期 1984.09.11
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 UCHIUMI KUNIAKI;ICHIDA TAKESHIGE
分类号 H03M1/12;H04N11/04 主分类号 H03M1/12
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