发明名称 DATA DELIVERING AND RECEIVING SYSTEM
摘要 PURPOSE:To simplify a procedure of a communication means for data delivering and receiving and a hardware and transfer a large amount of data in a short time by assigning a right of using a memory for data delivering and receiving to the other voluntarily. CONSTITUTION:In case of a MPU 3, 4 do no deliver and receive data, memory 5, 6 are not set any flag on the top part. Thereby MPU 3, 4 obtain the right of using memory 5, 6, and inverse a FF7, 8 and repeat an action to assign the right of using a memory voluntarily. In case of the data are transferred to the MPU 4 from the MPU 3, the transferred data is written and data flugs are set to the memory 5 after the right of using the memory 5 is given. After the completion of the data writing, a set signal is given to a FF7, and the FF7 is inverted to give the right of using the memory 5. By this means, data, i.e., transferred data corresponding to a data prominant flag of the memory 5 is read in the MPU 4.
申请公布号 JPS6162158(A) 申请公布日期 1986.03.31
申请号 JP19840184225 申请日期 1984.09.03
申请人 NF KAIRO SEKKEI BLOCK:KK 发明人 HARADA SHUICHI;YOSHIDA YUTAKA
分类号 G06F12/00;G06F9/52;G06F13/38;G06F15/16;G06F15/167;G06F15/177 主分类号 G06F12/00
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