发明名称 METHOD OF PRODUCING SEMICONDUCTOR DEVICE HAVING PLANAR JUNCTION
摘要 The invention relates to a method for the manufacture of high voltage semiconductor devices with at least one planar junction with a variable charge concentration. The method consists in doping with impurities of a same type, in a region of monocrystalline semiconductor material, a first zone, and then a second zone which comprises the first, and so on, and in carrying out a subsequent heat treatment so as to provide a planar junction with a stepped profile and a concentration of impurities which decreases from the center to the periphery in a predetemined range. In this way the intensity of the surface electric field, when the junction is reverse biased, is reduced as a result of which it is possible to provide planar junctions having very high breakdown voltages of some thousands of volts.
申请公布号 JPS6159868(A) 申请公布日期 1986.03.27
申请号 JP19850181920 申请日期 1985.08.21
申请人 SGS ATES COMPONENTI ELETTRON SPA 发明人 JIYUZETSUPE FUEERA;SARUBUATOORE MUSUMESHI
分类号 H01L21/265;H01L21/331;H01L29/06;H01L29/10;H01L29/36;H01L29/73;H01L29/732 主分类号 H01L21/265
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