| 摘要 |
<p>An information processor comprises a plurality of instruction execution units and a circuit that distributes the decoded information of a succeeding instruction to one of the instruction execution units on the basis of sequentially decoded information of succeeding instructions and the decoded information of preceding instructions under the control of the instruction execution units. Specifically, the distribution circuit distributes the decoded information of the succeeding instruction conflicting with the preceding instruction to the instruction execution unit that is controlling the preceding instruction. The respective instruction execution units can thus execute the instructions independently of one another while guaranteeing a correctly operated result. The result is enhancement of the processing capability.</p> |
