| 摘要 |
The data processing system includes a central processing unit (PCU) (53) to which is connected an I/O bus (59) and a memory bus (61). The data processing system further includes an I/O controller (55) and a video control section (57). The I/O controller includes a terminal control section (75) which is connected to the CPU through an RS232 cable, and I/O control section (77) which is connected to the I/O bus over a single line and a single processor (71) for managing both the terminal control section and the I/O control section. The I/O control section includes a plurality of interface and control subsystems (91-101) each for use with a separate peripheral device and an I/O bus interface (89) and control subsystem. The terminal control section includes a video control section interface (83) through which data is sent directly to the video control section (57) over a separate line (87), and a keyboard interface (79) for interfacing the terminal control section to a keyboard. The video control section (57) includes a video memory (127) and a microprocessor (128) which are both connected to the memory bus (61). The microprocessor manages the video memory so as to generate analog video signals from data received from the terminal control section which will produce characters or graphics on a CRT display (65) which is connected to the video control section, and also (along with associated logic) generates the nessary video timing control signals for the CRT display. The system eliminates the need for a separate processor for each peripheral control device, eliminates the need for a video memory and certain logic in the terminal and eliminates certain logic and/or hardware normally needed to generate the necessary video timing control signals. Furthermore, by having the display memory (128) on the memory bus (81), it can be accessed easily by the CPU (53) for use in displaying graphics. |
