LOGIC/ARRAY TESTER

摘要

A test system for testing circuits in integrated circuit chips includes a host computer for controlling the test system, and a plurality of blocks operable in parallel and each including a controller, storage for test programs and test data, and plurality of electronic units or pin electronics cards, one unit being associated with one of the pins of a device under test. Each of the electronic units include timing circuitry for timing its associated pin independent of the timing of any other electronics unit.