| 摘要 |
A ROM has 16 memory locations of addresses No. 0 to No. 15. Bass pattern data for the first bar are stored in the memory locations of the addresses No. 0 to No. 7, and bass pattern data for the second bar are stored in the memory locations of the addresses No. 8 to No. 15. The memory locations of the addresses No. 0 to No. 7 are specified by respective counts "0" to "7" of a hexadecimal counter, and the memory locations of the addresses No. 8 to No. 15 are specified by respective counts "8" to "15" of the counter. The output of the counter for the counts "8" to "15" is supplied through a gate circuit to the ROM. The gate circuit is inhibited by the output of a chord designating key section.
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