| 摘要 |
PURPOSE:To improve characteristics by the reduction in a parasitic resistance value, by arranging source and drain electrodes or a base electrode in the vicinity of a gate electrode, an emitter electrode or the like. CONSTITUTION:An N type region 2, which is to become a channel layer, is formed in a semi-insulating GaAs substrate 1. A mask 3 is provided and the region is etched. Thus a gate electrode 4 is formed. The top part of an SiO2 film 5 is exposed on the substrate 1. Then the upper surface of the gate electrode 4 is exposed. Thereafter, a metal layer, which is to become a metal mask, is deposited. A metal mask 8 is formed in a window 7 with a resist film 6 as a mask. Then impurities are introduced in source and drain regions 9. Thereafter source and drain electrodes 10 are formed. The end of the electrode 10 on the side of the gate electrode 4 is controlled by the metal mask 8, and the interval becomes very close. At the same time, an AuGe layer 10a and an Au layer 10b are deposited on the metal mask 8. Then an insulation film 11 is formed. Finally a wiring 12 is formed. |
