发明名称 CYCLIC TRANSMISSION SYSTEM
摘要 PURPOSE:To transmit periodically a data by allowing a transmission station to circulate a series of transmission period when no priority transmission request exists in a transmitted station, and providing a means occupying forcibly the right of transmission received by the transmitted station when a priority transmission request exists to decrease the delay in transmission of data. CONSTITUTION:Each transmission station ST consists of a microprocessor MPU, a RAM, a ROM, a data link controller DLCO, a parallel interface PIF, tristate gates G1, G2 and first-in first-out FIFO1. A data of one station is assigned to a data section D of the frame used for the system for one frame. When the priority request does not exist in any ST, the transmission station circulates a series of transmission period. When an ST has a priority request, after the end of data reception, the gate G1 is turned off so as to prevent the data from flowing to the downstream ST, the right of transmission is occupied forcibly to decrease the transmission delay in data.
申请公布号 JPS60256252(A) 申请公布日期 1985.12.17
申请号 JP19840110836 申请日期 1984.06.01
申请人 HITACHI SEISAKUSHO KK 发明人 SAITOU KUNIO;KONUMA CHIEKO;SATOU HIROSHI
分类号 H04L12/433 主分类号 H04L12/433
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