发明名称 MANUFACTURE OF INTEGRATED CIRCUIT
摘要 PURPOSE:To decrease unconnected wiring of CAD and to increase the effective utilization of tracks, when wirings, by which basic cell lines of ICs are mutually connected, are formed by the CAD, by bending the wirings along the existing obstacles. CONSTITUTION:A wiring C must be laid when a wiring A is formed. Terminals 24g and 24h must be connected by laying a wiring D. At this time, the second- layer wiring is bent along the wiring A, in forming a wiring B, which connects terminals 24c and 24d. Then, the wiring C, which connects terminals 24e and 24f, is formed. In this way, a part between the terminals 24g and 24h, which are not connected by the conventional CAD wiring method, is wired by the CAD. The wiring in the first layer or the second layer is bent along an obstacle. By introducing this method, tracks, which are not utilized, can be effectively utilized.
申请公布号 JPS60254748(A) 申请公布日期 1985.12.16
申请号 JP19840111452 申请日期 1984.05.31
申请人 FUJITSU KK 发明人 NISHIKAWA YASUHIRO
分类号 H01L21/822;H01L21/82;H01L27/04;H01L27/118 主分类号 H01L21/822
代理机构 代理人
主权项
地址