发明名称 THREE-DIMENSIONAL INTEGRATED CIRCUIT
摘要 PURPOSE:To simplify the construction of interlayer coupling means for transferring signals between first and second active layers and to remarkably simplify the process of providing an interlayer wiring in the manufacturing processes, by electrically coupling first and second active layers through electrostatic capacity. CONSTITUTION:Interlayer coupling electrodes ILE1 and ILE2 are arranged closely to be opposed to each other near field effect transistors FET1 and FET2. The electrodes ILE1 and ILE2 are formed of semiconductor material having an impurity diffused in high density, of metallic material, or of metal silicide. A thin layer of insulating material ILI is interposed between these electrodes, the insulating material consisting of an oxide such as SiO2, silicon nitride or semi-insulating semiconductor crystals of which upper and lower active layers AL2 and AL1 are formed. The electrodes ILE1, ILE2 and the insulating material ILI thus constitute an interlayer coupling having electrostatic capacity. Since there is no need of providing ohmic contact, the manufacturing process can be simplified remarkably and the yield can be improved substantially.
申请公布号 JPS60246654(A) 申请公布日期 1985.12.06
申请号 JP19840103269 申请日期 1984.05.22
申请人 KOGYO GIJUTSUIN (JAPAN) 发明人 SEKIKAWA TOSHIHIRO;HAYASHI YUTAKA;TSURUSHIMA TOSHIO
分类号 H01L21/3205;H01L21/822;H01L23/52 主分类号 H01L21/3205
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