发明名称 HIGH-SPEED COMMUNICATION CONTROLLER
摘要 PURPOSE:To prevent mis-reception of reception data by allowing a communication controller itself to supervise the busy state of a central processing unit and informing an opposite terminal equipment to suppress data transmission. CONSTITUTION:Plural reception buffers 4 of the controller 2 are prepared by if no reception command is given from a central processing unit CPU1 to a signal line 6, the received data are stored sequentially in the buffers 4. When the reception command is transmitted, the data are transferred sequentially to the CPU1 from the reception buffers 4 not transmitting the data yet via a signal line 8. When no reception command is transmitted and the number of the reception buffers 4 not transmitting the data yet reaches a predetermined limit or over, it is discriminated that the CPU1 is busy, the content of a busy notice buffer 9 is transmitted to inform the busy state to the opposite terminal equipment. Then the reception command is transmitted, the number of the reception buffers 4 not transmitting the data yet is reduced and when the number reaches a predetermined limit or below, it is discriminated that the busy state of the CPU1 is released, the content of the busy release information buffer 10 is transmitted to inform the release of busy state to the opposite terminal equipment.
申请公布号 JPS60235561(A) 申请公布日期 1985.11.22
申请号 JP19840091496 申请日期 1984.05.08
申请人 NIPPON DENKI KK 发明人 FURUKAWA TOSHIO
分类号 H04L29/10;H04L13/00;(IPC1-7):H04L13/00 主分类号 H04L29/10
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