| 摘要 |
PURPOSE:To accelerate a change in a potential of an input line after an amplifier output action in terms of output pre-amplifier circuit of an MOS, a RAM, etc., by following the potential of means holding the potential in accordance with an input signal to the input line. CONSTITUTION:When a clock phi4 becomes a high level, transistors Q11 and Q12 are turned on, and a write signal is added to IO lines 3 and 4 from a write circuit 5. Since a gate of a transistor Q13 is connected to a power source VCC, a potential of the IO line 3 begins dropping, and the transistor Q13 is turned on in a short time and starts discharging of a node N1, whose potential follows that of the IO line 3. A gate voltage of a transistor Q1 drops sharply, which causes drive capability for holding the IO line 3 at a high level to drop adruptly, and writing of the high level of the IO line 3 to an OV can be possible. A similar ction is carried out in the IO line 4. |
