| 摘要 |
PURPOSE:To synthesize pictures at a high speed by providing window start and end marks at the start and the end of a window area together with end marks put at the end of each line, and performing the synthesization of pictures with compressed code trains. CONSTITUTION:When a processor 13 outputs a synthesization start instruction to a gate 2, a clock pulse is fed to a total diagram buffer 5 from a clock pulse generating part 1 via the gate 2. Then data are read out every bit synchronously with said clock puse. The picture data read out of the buffer 5 are supplied in series to a shift register 15 with which the clock pulse synchronizes. Here a gate 10 transfers the series output of the register 15 to a synthetic diagram buffer 6 in response to the start instruction. While the parallel output of the register 15 is sent to a mark detecting part 9. The part 9 checks whether or not the data stored in the register 15 is equal to the window start or end mark designated by the register 15.
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