发明名称
摘要 PURPOSE:To enable to check causes to error, by checking the information just before the write-in to a memory and storing the error address, in a memory device using an ECC system. CONSTITUTION:When information is written in a memory 1, one bit error correction check bit is added with a check bit production circuit 3. If a data bit written in l1 is transferred and a check circuit detects errors, an associative memory 6 stores the memory address of error detection. When the memory 1 is read out and any error is detected in an ECC circuit 5, the address at that time and a readout control signal are transferred to an address designation circuit 7. When coincidence is detected at the associative memory 6, the memory content is transmitted externally. If not detected, it means that no error is present at the write-in to the memory 1.
申请公布号 JPS6046457(B2) 申请公布日期 1985.10.16
申请号 JP19800110092 申请日期 1980.08.11
申请人 FUJITSU LTD 发明人 SAKAI KENJI;NODA KATSUNOBU
分类号 G06F12/16;G06F11/10 主分类号 G06F12/16
代理机构 代理人
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