发明名称 CODE ERROR DETECTING CIRCUIT
摘要 <p>PURPOSE:To execute easily a measurement even by a transmission line for one sequence data by sending both a pattern to be compared and a comparing pattern to a receiving side, and approviing an error rate, in a detecting circuit used for especially, a digital radio equipment. CONSTITUTION:In the transmitting side, as for a pseudo random code outputted from a pseudo random code generator 1 driven by a clock which has frequency- divided the output of a clock generator 11 into 1/2, a part of said code remain as it is, and the remaining part is converted to a series code by a parallel/series converting circuit 12 through an (n) bit delaying circuit 2 and sent out of a terminal 13. In the receiving side, a data and a clock are provided to a series/ parallel converting circuit 20 through a terminal 27 and 28. A seried data which is divided into clocks 73, 4 of two sequences by this circuit 20 and received is converted to parallel data 5, 6 of two sequences by using rise of this clock. This parallel data is provided to comparing circuits 23, 24 directly and through an (n) bit delaying circuit 21 and an (n-1) bit delaying circuit 22.</p>
申请公布号 JPS60200632(A) 申请公布日期 1985.10.11
申请号 JP19840057636 申请日期 1984.03.26
申请人 FUJITSU KK 发明人 KAWAI MASAHISA;HODOHARA KIYOAKI
分类号 H04L1/00;H03M9/00;H03M13/00;H04L1/24 主分类号 H04L1/00
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