| 摘要 |
A digital signal reconstruction circuit includes a reproduction means for reading a digital data signal recorded on a recording medium, signal derivation means for deriving a plurality of shifted signals produced by sequentially shifting the read digital data, arithmetic means, comprising a logical sum circuit and a logical product circuit, for processing the output from the signal derivation means, selector means for selecting either the output from the logical sum circuit or the logical product circuit and latch means receiving the output of the selection means, the output of the latch means being fed back to the selector means to control the selection of either the logic sum circuit or the logic product circuit in accordance with the logic level of the latch means output.
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