| 摘要 |
Integrated logic circuit comprising a pushpull amplifier stage, T1 T2 in which by means of a bootstrap circuit the potential at the gate of the "push" transistor T1 is brought above the supply voltage so that the output voltage of the amplifier lies above the supply voltage minus the threshold voltage of the said transistor. In order to prevent the charge from leaking away after the bootstrap capacitance (T3) has been charged via an enhancement transistor (T6), the enhancement transistor is cut off by means of the "low" input signal. A second bootstrap circuit (T7, T8) (between the input and the gate of the enhancement transistor) ensures that the first bootstrap capacitance (T3) is charged up to the full supply voltage because the latter gate electrode is lifted above the supply voltage by the second bootstrap (T7, T8). |
