发明名称 |
CLOCK SELECTION CONTROL CIRCUIT |
摘要 |
<p>TITLE CLOCK SELECTION CONTROL CIRCUIT A circuit which controls the selection and activation of one of a plurality of clock circuits arranged in copies. Selection circuitry is used to detect failure of an on-line clock circuit, scan a plurality of available clock circuits in a predetermined sequence and place the next available properly operating clock circuit on line. Control circuitry prevents erroneous clock selection during power-up/ power down operations and enables predetermined clock circuit copies to be disabled.</p> |
申请公布号 |
CA1194191(A) |
申请公布日期 |
1985.09.24 |
申请号 |
CA19830435329 |
申请日期 |
1983.08.25 |
申请人 |
GTE AUTOMATIC ELECTRIC INCORPORATED |
发明人 |
EDWARDS, IVAN L.;MACRANDER, MAX S.;KHAN, ASHFAQ R. |
分类号 |
H04M3/22;G06F1/04;(IPC1-7):H04Q3/42 |
主分类号 |
H04M3/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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